
|
BRAND |
TRICONEX |
|
Model Number |
3006 |
|
Module Description |
Main Processor Module |
|
Country of Origin |
USA |
|
EPROM Memory |
512 KB |
|
Logic power |
15 W |
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Overview
The Triconex 3006 is an Enhanced Main Processor (EMP II) module used in Tricon v9.0–v9.5 systems. It features a 25 MHz 32-bit CPU and 2 MB of SRAM, functioning as a core controller for high-reliability Triple Modular Redundancy (TMR) safety instrumented systems.
Main Processor Modules
A Tricon chassis houses three Main Processor Modules, each serving one channel (also referred to as a leg) of the controller. Each processor independently communicates with its I/O subsystem and executes the control program. The three MP Modules compare data and the control program at regular intervals. Each Main Processor operates autonomously with no shared clocks, power regulators, or circuitry. Processor specifications are listed in the specifications table for each MP.
A high-speed proprietary bus system called TriBus provides these functions: interprocessor communications, hardware majority voting of all digital input data, and comparison of control program variables. TriBus uses a fully isolated, serial communication channel operating at 4 megabits per second. A direct memory access controller manages the synchronization, transfer, voting and data correction independent of the control program or executive software.
DRAM (dynamic random-access memory) is used for control program, sequence-of-events data, I/O data, diagnostics, and communication buffers. SRAM (static random-access memory) is used for the defined program retentives and configuration of disabled points. Memory is regularly validated by the TriBus hardware-voting circuitry.
Sequence of Events Capability
Main Processors work with the communication modules to provide the Tricon controller with sequence-of-events (SOE) capability. During each scan, the Main Processors inspect designated discrete (Boolean) variables for changes of state known as events. When an event occurs, the Main Processors save the current state of the variable and includes a time stamp in an area of memory called a buffer which is a part of an SOE block. You can configure the SOE blocks using TriStation and retrieve the event data with software such as the Triconex SOE Recorder.
Main Processor Front Pane
This figure depicts the Main Processor front panels for models 3006, 3007, and 3008.
3006 and 3007 Main Processor Architecture
This figure depicts the model 3006 and 3007 Main Processor architecture, which can be used with Tricon v9.0—v9.5 systems. They have the same architecture and specifications, except for SRAM, which is 2 megabytes for the 3006 and 1 megabyte for the 3007.
Specifications
This table lists the specifications for the 3006 and 3007 Main Processors, which can be used with Tricon v9.0—v9.5 systems.
|
Feature |
Specification |
|
Central Processor |
National NS32GX32, 32-bit, 25 MHz |
|
Math Co-processor |
National NS32381, 32-bit, 25 MHz |
|
EPROM Memory |
512 KB |
|
SRAM |
Model 3006: 2 MB Model 3007: 1 MB |
|
Clock Calendar |
Time and date Battery backup Typical drift: ±2 seconds per day Maximum drift: ±8.6 seconds per day |
|
TriBus |
4 megabits/second, 16-bit DMA |
|
Serial Port |
For Diagread diagnostic analysis Optically isolated RS-232 interface on one 25-pin connector 500 VDC isolation |
|
Communication Processor |
Intel 80C152 32 KB EPROM, 64K shared memory interface 16 MHz |
|
Communication Interface Protocol Baud rate |
RS-485 2 megabits per second |
|
I/O processor |
Intel 80C31 12 MHz 32 KB EPROM 64K Shared Memory Interface |
|
I/O interface Protocol Baud Rate |
RS-485 375 kilobits per second |
|
Logic power |
15 W |
FAQ
Q1: How does the Triconex 3006 leverage its dual-processor architecture to deliver deterministic performance in safety-critical control systems?
A1: The Triconex 3006 integrates a 32-bit National NS32GX32 central processor and a 32-bit NS32381 math co-processor, both operating at 25 MHz, to provide dependable computational performance for high-integrity Tricon control applications.
Q2: Why is the Triconex 3006 considered an effective solution for high-availability industrial safety platforms?
A2: The Triconex 3006 features 2 MB of SRAM, 512 KB of EPROM, and a high-speed TriBus operating at 4 Mbps with 16-bit DMA, enabling efficient data processing, reliable memory management, and continuous system operation.
Q3: What communication technologies enable the Triconex 3006 to maintain seamless interaction with distributed I/O and engineering workstations?
A3: The Triconex 3006 supports an optically isolated RS-232 diagnostic interface and RS-485 communication channels operating at up to 2 Mbps, ensuring secure diagnostics and dependable communication with connected system components.
Q4: Which integrated diagnostic and timing capabilities distinguish the Triconex 3006 in mission-critical automation environments?
A4: The Triconex 3006 incorporates a real-time clock with battery backup for accurate time and date retention, along with a dedicated serial port for Diagread diagnostic analysis, simplifying system monitoring, troubleshooting, and preventive maintenance.
Q5: How does the Triconex 3006 optimize processing efficiency while maintaining low power consumption in Tricon safety systems?
A5: The Triconex 3006 combines dedicated communication and I/O processors with only 15 W of logic power consumption, delivering efficient processing, rapid data exchange, and reliable long-term operation in demanding industrial safety applications.
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